`define DMsize 3072
module DM(
        input [31:0] data,
        input [31:0] address,
        input clk,
        input rst,
        input MemWrite,
        input MemRead,
        input [31:0] pc,
        output [31:0] mem
    );
    reg [31:0] dataMem[0:`DMsize-1];
    integer i=0;
    assign mem=(MemRead==1'b1)?dataMem[(address)>>2]:32'd0;
    always @(posedge clk) begin
        if(rst) begin

            for(i=0;i<`DMsize;i=i+1)
                dataMem[i]<=32'd0;
        end
        else if(MemWrite) begin
            dataMem[address>>2]<=data;
            $display("@%h: *%h <= %h", pc, address, data);
        end
        else begin
            for(i=0;i<`DMsize;i=i+1)
                dataMem[i]<=dataMem[i];
        end

    end
endmodule
